1. Field of the Invention
The present invention relates to a display panel, and more particularly relates to a display panel in which pins of a chip can be accurately bonded to pins of a substrate.
2. Description of Related Art
With prominent display quality and low costs, cathode ray tube (CRT) displays have dominated the display market in recent years. However, the CRT display not only produces hazardous radiation but also occupies a large space. Recently, thanks to rapid development in the semiconductor devices, planar displays having the advantages of high definition, great space utilization efficiency, low power consumption and non-radiation have become the mainstream products in the display market.
The planar display is consisted of a display panel, a light source for providing sufficient luminance to the display panel, and driving chips disposed on a substrate of the display panel. The driving chips are employed to drive circuits within the display panel, such that the display panel is capable of displaying images.
FIG. 1A is a schematic view of a conventional display panel, while FIG. 1B is an enlarged partial view of FIG. 1A. Referring to FIG. 1, a plurality of pad regions 120 is disposed in a non-display region 110a of a substrate 110 in a display panel 100, and a plurality of pins 122 is disposed in each of the pad regions 120. The pins 122 are electrically connected to pins 132 of driving chips 130.
However, due to material properties of the pins 122 and 132, when the pins 132 of the driving chips 130 and the pins 122 in each of the pad regions 120 are bonded through implementing a thermal compression process, the pins 122 may encounter quality issues related to shape deformation, positional deviation, etc. According to different positions where the pins 122 are disposed in the pad region 120. All the issues result in imperfect bonding of the pins 132 of the driving chips 130 to the pins 122 in each of the pad regions 120. As a bonding rate of the pins 132 of the driving chips 130 to the pins 122 on the substrate 110 is rather low, the display quality of the display panel 100 is then greatly impaired.